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| TRIPLE 2-WIDE OA/OAI GATE SY100S317 FEATURES s Max. propagation delay of 900ps s IEE min. of -48mA s Extended supply voltage option: VEE = -4.2V to -5.5V s Voltage and temperature compensation for improved noise immunity s Internal 75K input pull-down resistors s Approximately 40% lower power than Fairchild s Function and pinout compatible with Fairchild F100K s Available in 24-pin CERPACK and 28-pin PLCC packages DESCRIPTION The SY100S317 is a set of ultra-fast, triple 2-wide OR/ AND gates designed for use in high-performance ECL systems. This device offers both true and complement outputs. The inputs on this device have 75K pull-down resistors. PIN CONFIGURATIONS VEES D1a D3a D2a D4a Oa Oa 4 3 Top View PLCC J28-1 2 1 28 27 26 19 20 21 22 23 24 25 11 10 9 8 7 6 5 Ea Eb VEE VEES Ec 12 13 14 15 16 17 18 Ob Ob VCCA VCC VCC Oc Oc BLOCK DIAGRAM Ea D1b D2b D1c VEES D3b D4b D1a D2a D3a D4a Eb D1b D2b D3b D4b Ec D1c D2c D3c D4c Oc Oc Ob Ob Oa Oa D2c D3c D4c D4b Ec VEE D3b Eb D3b D4b D1c D2c D3c D4c 1 2 3 4 5 6 24 23 22 21 20 19 18 Top View Flatpack F24-1 17 16 15 14 Ea D4a D3a D2a D1a Oa Oa 7 13 8 9 10 11 12 Oc VCC VCCA Oc PIN NAMES Pin Dna - Dnc Ea - Ec Oa - Oc Oa - Oc VEES VCCA Function Data Inputs (n = 1...4) Enable Inputs Data Outputs Complementary Data Outputs VEE Substrate VCCO for ECL Outputs Rev.: G Amendment: /0 1 Issue Date: July, 1999 Ob Ob Micrel SY100S317 DC ELECTRICAL CHARACTERISTICS VEE = -4.2V to -5.5V unless otherwise specified, VCC = VCCA = GND Symbol IIH IEE Parameter Input HIGH Current, All Inputs Power Supply Current Min. -- -48 Typ. -- -32 Max. 200 -22 Unit A mA Condition VIN = VIH (Max.) Inputs Open AC ELECTRICAL CHARACTERISTICS CERPACK VEE = -4.2V to -5.5V unless otherwise specified, VCC = VCCA = GND TA = 0C Symbol tPLH tPHL tPLH tPHL tTLH tTHL Parameter Propagation Delay Data to Output Propagation Delay Enable to Output Transition Time 20% to 80%, 80% to 20% Min. 300 300 300 Max. 1000 800 900 TA = +25C Min. 300 300 300 Max. 1000 800 900 TA = +85C Min. 300 300 300 Max. 1000 800 900 Unit ps ps ps Condition PLCC VEE = -4.2V to -5.5V unless otherwise specified, VCC = VCCA = GND TA = 0C Symbol tPLH tPHL tPLH tPHL tTLH tTHL Parameter Propagation Delay Data to Output Propagation Delay Enable to Output Transition Time 20% to 80%, 80% to 20% Min. 300 300 300 Max. 900 700 900 TA = +25C Min. 300 300 300 Max. 900 700 900 TA = +85C Min. 300 300 300 Max. 900 700 900 Unit ps ps ps Condition 2 Micrel SY100S317 TIMING DIAGRAM 0.7 0.1 ns INPUT 0.7 0.1 ns -0.95V 80% 50% 20% -1.69V TRUE tPHL tPLH 50% OUTPUT tPLH tPHL 80% 50% 20% tTLH tTHL COMPLEMENT Propagation Delay and Transition Times NOTE: VEE = -4.2V to -5.5V unless otherwise specified, VCC = VCCA = GND PRODUCT ORDERING CODE Ordering Code SY100S317FC SY100S317JC SY100S317JCTR Package Type F24-1 J28-1 J28-1 Operating Range Commercial Commercial Commercial 3 Micrel SY100S317 24 LEAD CERPACK (F24-1) Rev. 03 4 Micrel SY100S317 28 LEAD PLCC (J28-1) Rev. 03 MICREL-SYNERGY TEL 3250 SCOTT BOULEVARD SANTA CLARA CA 95054 USA FAX + 1 (408) 980-9191 + 1 (408) 914-7878 WEB http://www.micrel.com This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc. (c) 2000 Micrel Incorporated 5 |
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